JPS6341106B2 - - Google Patents

Info

Publication number
JPS6341106B2
JPS6341106B2 JP57231894A JP23189482A JPS6341106B2 JP S6341106 B2 JPS6341106 B2 JP S6341106B2 JP 57231894 A JP57231894 A JP 57231894A JP 23189482 A JP23189482 A JP 23189482A JP S6341106 B2 JPS6341106 B2 JP S6341106B2
Authority
JP
Japan
Prior art keywords
main memory
data
store
control unit
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57231894A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59123973A (ja
Inventor
Juji Oinaga
Shoji Nakatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57231894A priority Critical patent/JPS59123973A/ja
Publication of JPS59123973A publication Critical patent/JPS59123973A/ja
Publication of JPS6341106B2 publication Critical patent/JPS6341106B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
JP57231894A 1982-12-29 1982-12-29 ベクトルデ−タ記憶制御方式 Granted JPS59123973A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57231894A JPS59123973A (ja) 1982-12-29 1982-12-29 ベクトルデ−タ記憶制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57231894A JPS59123973A (ja) 1982-12-29 1982-12-29 ベクトルデ−タ記憶制御方式

Publications (2)

Publication Number Publication Date
JPS59123973A JPS59123973A (ja) 1984-07-17
JPS6341106B2 true JPS6341106B2 (en]) 1988-08-15

Family

ID=16930697

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57231894A Granted JPS59123973A (ja) 1982-12-29 1982-12-29 ベクトルデ−タ記憶制御方式

Country Status (1)

Country Link
JP (1) JPS59123973A (en])

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2634834B2 (ja) * 1988-01-13 1997-07-30 株式会社日立製作所 記憶制御方式

Also Published As

Publication number Publication date
JPS59123973A (ja) 1984-07-17

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